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Capture The Bug: A Design Verification Hackathon

The only real mistake is the one from which we learn nothing. – Henry Ford

September 03, 2022

Design verification is tough, but getting hands-on experience? Even tougher. Capture The Bug Hackathon changed that.

2000+ participants signed up. 400+ designs submitted. 140+ successfully completed. The challenge? Debugging and verifying real-world chip designs. No fluff—just pure execution*

This Hackathon was organized by NIELIT Calicut and technically facilitated by Vyoma Systems , VLSI System Design & IEEE Robotics and Automation Society and ably mentored by Indian Institute of Technology Madras.

A few made it to the top. Many walked away sharper. And for the next wave of verification engineers, this is just the beginning.


Design Verification